Translation hardware assist for data communication switch
US6389035B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 8, 1998 |
| Grant date | May 14, 2002 |
| Priority date | — |
| Expiry date | May 8, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/22
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A protocol translation hardware assist for resolving protocol incompatibilities in a multi-protocol switching environment. Discrete information units are transferred seamlessly from inputs to disparate protocol outputs by writing inbound discrete information units into selected address spaces in allocated buffers in a transfer queue in a manner which accounts for protocol format differences while allowing for straightforward dequeueing. The hardware assist fragments inbound discrete information units into multiple outbound units and creates offsets indicated by destination protocol requirements. A bypass check may be implemented to avoid subjecting to the fragmentation inquiry discrete information units for which it can be inferred a priori that fragmentation is not required.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.