Implantable medical device incorporating self-timed logic
US6389315B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 2000 |
| Grant date | May 14, 2002 |
| Priority date | — |
| Expiry date | Feb 25, 2020 |
Classification
- Technology area (CPC A)Human Necessities
- CPC primaryA61N1/3708
- WIPO fieldMedical technology
- WIPO sectorInstruments
Abstract
Improved operating system architecture for an implantable medical device incorporating self-timed logic for reducing power consumption and increasing and improving processing capabilities is disclosed. The self-timed logic is employed to implement digital signal processors (DSPs) including analog to digital (ADC) signal converters, a state machine or the components of microprocessor cores, e.g., the CPU, arithmetic logic units (ALU), on-chip RAM and ROM and data and control buses, and other logic units, e.g., additional RAM and ROM, a direct memory address (DMA) controller, a block mover/reader, a cyclic redundancy code (CRC) calculator, and certain uplink and downlink telemetry signal processing stages. The self-timed CMOS logic is incorporated into the same IC or ICs with clocked CMOS logic in a manner that minimizes the size of the clock tree serving the clocked CMOS logic, allows for efficient allocation of chip real estate, and provides manufacturing economies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.