Restore tracking system for DRAM
US6389505B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 19, 1998 |
| Grant date | May 14, 2002 |
| Priority date | — |
| Expiry date | Nov 19, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0802
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for reducing the number of refresh actions needed to maintain data in a DRAM, by restoring only those cells which haven't been read from or written to within an allotted data retention time. One embodiment describes a restore tracking system as applied to a DRAM cache. The restore tracking system can alternatively be applied to any memory architecture having duplication of information. For example, the number of refresh actions needed to maintain data entries in a DRAM can be reduced by recording and updating a refresh status of one or more of the data entries in the DRAM; and invalidating those data entries having an expired status. Thus, more memory bandwidth can be made available to a computer system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.