High-speed low-power low-offset hybrid comparator

US6392449B1 · kind B1 · utility

Assignee

• NATIONAL SEMICONDUCTOR CORPORATION · US

Inventor

• Robert C. Taft · Munich, DE

Key dates

• Filing date: Jan 5, 2001
• Grant date: May 21, 2002
• Expiry date: Jan 5, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03K5/249
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

A comparator circuit includes a regenerative stage that uses a relatively small quiescent current combined with a relatively large dynamic current to charge a common-source node in the regenerative stage. The quiescent current helps maintain the common-source node in the regenerative stage near a desired charged level. The comparator circuit can also include an input isolation circuit to eliminate charge kick-back to the input signal lines.