Data transfer device and liquid crystal display device
US6392619B1 · kind B1 · utility
16Cited by
10References
20Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | May 18, 1999 |
| Grant date | May 21, 2002 |
| Priority date | — |
| Expiry date | May 18, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G3/3685
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In a data transfer circuit, a hold signal generating circuit generates and outputs a hold signal Hold when transmission data is equal to transmission data one cycle before, and sets a 3-state output buffer for transmission data to high-impedance state, while, in a data reception circuit, when the hold signal Hold is valid, a data reception circuit outputs the reception data held, thereby power consumption in a data bus which is terminated with a terminal resistor is reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.