Loading data plane on reconfigurable chip
US6392912B1 · kind B1 · utility
97Cited by
3References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 10, 2001 |
| Grant date | May 21, 2002 |
| Priority date | — |
| Expiry date | Jan 10, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A reconfigurable chip includes data registers which can be loaded from off-chip or on-chip. The data register comprises a register block produced from a number of register block units. The register bock units include an active plane store storing the current value of the register bit, at least one off-chip data background store storing a data bit which can be loaded from off-chip, and at least one on-chip data background store storing a value which can be loaded from on-chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.