Gate transition counter
US6396312B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 11, 2000 |
| Grant date | May 28, 2002 |
| Priority date | — |
| Expiry date | Aug 11, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG04F10/04
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A gate transition counter. A ring oscillator provides a plurality outputs, each delayed from the adjacent output by a gate delay. The outputs of the ring oscillator are captured by an array of latches upon receipt of a halt signal. The last latch drives a ripple counter. The preferred implementation uses five inverters in the ring oscillator so that each complete cycle of the ring oscillator represents ten gate delays. A ripple counter counts the number of gate delays by ten. The latch outputs and the ripple counter outputs can be converted to a binary representation of the number of gate delays to provide a count with the smallest time increment that can be produced by the circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.