Patent · US Expired

Semiconductor integrated circuit equipped with function for controlling the quantity of processing per unit time length by detecting internally arising delay

US6396321B1 · kind B1 · utility

6Cited by
4References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 23, 2000
Grant dateMay 28, 2002
Priority date
Expiry dateFeb 23, 2020

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F1/04
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A semiconductor integrated circuit 10 comprises an internal logic circuit 16, a delay detecting circuit 11 which monitors changes in delay length within the semiconductor integrated circuit 10, and a central control circuit 14 which controls the quantity of processing per unit time length by the internal logic circuit 16 on the basis of changes in delay length monitored by the delay detecting circuit 11.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.