Switching arrangements
US6396332B2 · kind B2 · utility
7Cited by
4References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 29, 2000 |
| Grant date | May 28, 2002 |
| Priority date | — |
| Expiry date | Nov 29, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/57
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In a switching arrangement for applying a pulse to a load, for example a magnetron, a plurality of FET modules are stacked along the longitudinal axis and surrounded by a housing enclosing four capacitors. The capacitor means provides a current return path for current applied via the FET switches of the modules the coaxial current cancelling construction of the arrangement results in low circuiting conductance. The capacitance may be sufficiently large to provide electrostatic screening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.