Photolithographically-patterned variable capacitor structures and method of making
US6396677B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 2000 |
| Grant date | May 28, 2002 |
| Priority date | — |
| Expiry date | May 17, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01F17/02
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A new type of high-Q variable capacitor includes a substrate, a first electrically conductive layer fixed to the substrate, a dielectric layer fixed to a portion of the electrically conductive layer, and a second electrically conductive layer having an anchor portion and a free portion. The anchor portion is fixed to the dielectric layer and the free portion is initially fixed to the dielectric layer, but is released from the dielectric layer to become separated from the dielectric layer, and wherein an inherent stress profile in the second electrically conductive layer biases the free portion away from the dielectric layer. When a bias voltage is applied between the first electrically conductive layer and the second electrically conductive layer, electrostatic forces in the free portion bend the free portion towards the first electrically conductive layer, thereby increasing the capacitance of the capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.