Dual-speed stackable repeater with internal bridge for cascading or speed-linking
US6396841B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 23, 1998 |
| Grant date | May 28, 2002 |
| Priority date | — |
| Expiry date | Jun 23, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/18
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Repeater units in a stack are identical. Each repeater unit has an internal repeater and an internal bridge. The repeater stack is dual-speed, with each repeater connecting to a 10 Mbps (10M) backplane bus and to a 100 Mbps (100M) backplane bus in the stack's chassis. The internal repeater has a 10M repeater circuit that connects 10M ports to the 10M bus, and a 100M repeater circuit that connects 100M ports to the 100M bus. Ports are configured for either 10M or 100M operation. Data from 10M ports is repeated to all other 10M ports and to the 10M bus, but not to 100M ports or the 100M bus. Instead, a 10M port is connected to the internal bridge, which is also connected to a 100M port. The internal bridge stores and forwards packets to and from the 10M port and the 100M port. Only one internal bridge in the stack is configured to link the 10M and 100M ports. Other internal bridges are configured to connect a cascading port to the internal repeater. The cascading port is buffered by the internal bridge. This buffering allows external repeaters to be cascaded without regard to the repeater limit. Repeater units in the stack can be automatically configured to enable only the first inte…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.