Method and apparatus for controlling write access to storage means for a digital data processing circuit
US6397310B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 1999 |
| Grant date | May 28, 2002 |
| Priority date | — |
| Expiry date | Apr 29, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/567
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The typical operation of AV processing ICs includes an initialisation mode wherein registers are set up according to the desired functionality using dedicated set up software, and a normal decoding mode in which the content of the registers will not be changed any more. Often the initialisation mode software leads to un-initialised pointers and addresses for the registers. The writing of data in case of invalid pointers or address values can be avoided by additional small hardware for the register write access logic which enables or disables a write enable signal for distinct periods of time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.