Semiconductor device with wiring substrate
US6400019B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 9, 2000 |
| Grant date | Jun 4, 2002 |
| Priority date | — |
| Expiry date | Nov 9, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The junction strength between the external terminals and the wiring substrate of a semiconductor device is improved without creating a large size semiconductor device. In the outer periphery of the back surface of an interposer substrate 1Bi on which a semiconductor chip constructing a CSP type semiconductor device 1 is mounted, there are arranged a plurality of bump electrodes 1BB1 whose size in the direction intersecting the sides of the interposer substrate 1B1 is larger than that in the direction along the sides of the interposer substrate 1Bi.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.