CMOS small signal terminated receiver
US6400178B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | May 30, 2000 |
| Grant date | Jun 4, 2002 |
| Priority date | — |
| Expiry date | May 30, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0027
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A terminator circuit for connection to a network can be fabricated and used within CMOS-SOI (complementary metal oxide semiconductor—silicon on insulator) for carrying small logic level signals for connecting data from a network's first circuit to a network's second circuit in which a network's input terminal connects a terminator circuit to the network's second circuit to act as a terminator on the data line passing data from the first circuit to the second circuit. The terminator circuit has a reference circuit coupled to a terminal circuit and to a differential hysteresis receiver. The reference circuit has devices back to back source coupled devices to each other for a tuned center reference voltage node. An upper level power source is connected to one side of the reference voltage node and a lower reference voltage power source is connected to the other side of the reference voltage node. The voltage level above the common tuned reference voltage and a lower level voltage is supplied to the terminator's corresponding input terminal circuit control nfet and pfet mirror devices also connected respectively to lower and upper level supply power to control each of their turn …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.