Buffer circuit
US6400189B2 · kind B2 · utility
15Cited by
9References
32Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 14, 1999 |
| Grant date | Jun 4, 2002 |
| Priority date | — |
| Expiry date | Dec 14, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00315
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A buffer circuit includes an amplifier, a pass gate circuit and a level shifter. The pass gate circuit communicates an input signal to the amplifiers and includes a terminal to control the communication. A level shifter furnishes a control signal to the terminal of the pass gate circuit and regulates the control signal based on a magnitude of the input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.