Flexible architecture for image processing
US6400471B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 11, 1999 |
| Grant date | Jun 4, 2002 |
| Priority date | — |
| Expiry date | Feb 11, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N1/2112
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system and a method for processing image data in a digital image device such as a digital camera. The present invention includes a bus, a central processing unit coupled to the bus, an image processing subsystem coupled to the central processing unit for processing the image data using a particular processing mode, a memory unit coupled to the bus, and a data storage element for storing the image data after image processing. The memory unit has stored therein an operating system for managing the image processing subsystem, and the memory unit also has a data structure for managing the image data for the image processing subsystem during image processing. The data structure provides an interface between the operating system and the image processing subsystem, such that the operating system is independent of the processing mode used by the image processing subsystem.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.