Interrupt/software-controlled thread processing
US6401155B1 · kind B1 · utility
63Cited by
14References
31Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 22, 1999 |
| Grant date | Jun 4, 2002 |
| Priority date | — |
| Expiry date | Mar 22, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30123
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Rapid thread processing is achieved by transferring complete thread contexts between a memory and a context register set. Each thread context is read from a respective memory location in response to either a designated interrupt or an instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.