Method and device for storing an IP header in a cache memory of a network node
US6401171B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 1999 |
| Grant date | Jun 4, 2002 |
| Priority date | — |
| Expiry date | Feb 26, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/329
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Method and device for caching the IP header of a message being routed through a data transmission network wherein each node includes a route processor for computing a routing algorithm, a main memory for storing the message, a cache memory; and an IP header detection logic circuit for storing the header in the cache memory as the message is being stored in the main memory. Once the header has been stored in the cache memory, it can be read from the cache memory in order to compute the routing algorithm. The new header resulting from the routing computation is written into the cache memory and is then read from the cache memory when the message including the header and the message data is sent over the network.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.