Memory access optimizing method
US6401187B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 12, 2000 |
| Grant date | Jun 4, 2002 |
| Priority date | — |
| Expiry date | Jun 12, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6028
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a memory access optimizing method which judges an access method suitable for each of memory accesses and executes the preload optimization and prefetch optimization, according to the judgement result, for an architecture equipped with a prefetch mechanism to write the data on a main storage device into a cache memory and a preload mechanism to write the data on the main storage device into a register without writing it into the cache memory. The memory access method judging step analyzes whether or not there is a designation of a memory access method by a user. Moreover, the memory access method judging step investigates whether or not the data are already in a cache memory, whether or not the data compete with other data for a cache, whether or not the data are to be referred to again later, and whether or not the data fulfill the restriction on register resources.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.