Patent · US Expired

Method for error recognition in a processor system

US6401217B1 · kind B1 · utility

16Cited by

5References

9Claims

0Family size

Assignee

Siemens Aktiengesellschaft · DE

Inventors

Mark Clark · Hersbruck, DE
Erich Sonnenschein · Planegg, DE

Key dates

Filing date	Jul 22, 1998
Grant date	Jun 4, 2002
Priority date	—
Expiry date	Jul 22, 2018

Classification

Technology area (CPC G)Physics
CPC primaryG06F11/0706
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The method enables an improved and faster error recognition of software errors in a processor or processor system in which programs subject information received from other programs to an error check, particularly to a plausibility check, and, given acquisition of error statuses, output a corresponding error message to the operating system. This error message contains an indication of the other program generating the faulty information and is stored in a respective error message table. The operating system thus learns of programs suspected of working in a faulty way from other programs collaborating with these programs, so that program errors can be recognized and localized significantly faster.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.