Method for fabricating top gate type polycrystalline silicon thin film transistor
US6403409B1 · kind B1 · utility
38Cited by
3References
25Claims
0Family size
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Inventor
Key dates
| Filing date | Aug 30, 2000 |
| Grant date | Jun 11, 2002 |
| Priority date | — |
| Expiry date | Aug 30, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
Abstract
A method for forming a top gate polysilicon type thin film transistor is disclosed. Prior to ion implantation, a gate insulating layer except for a gate region is removed to lower an energy level for ion implantation. When two impurity types of a transistor are made on the same substrate, low energy ions are implanted to diminish a photoresist burning problem. Therefore, it is possible to improve conductivity of polysilicon and alleviate damage to the polysilicon.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.