Current-Mode Peak Detector
US6404241B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 13, 2000 |
| Grant date | Jun 11, 2002 |
| Priority date | — |
| Expiry date | Jan 13, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R19/04
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A current-mode peak detector circuit is disclosed. The current-mode peak detector circuit includes an input transistor for receiving an input current that impresses a voltage on a control node, a pair of transistors for providing an output current in response to the voltage at the control node, and a decay control circuit for controlling the decay of the voltage at the control node such that the output current is representative of a peak value of the input current signal. A clamp circuit may be provided for clamping the input voltage to a predetermined level. All of the elements of the current-mode peak detector circuit may be realized using transistors for facilitating integration of the current-mode peak detector circuit on an integrated circuit. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other researcher to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.