Parallelized programmable encoder/syndrome generator
US6405339B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 1999 |
| Grant date | Jun 11, 2002 |
| Priority date | — |
| Expiry date | Aug 31, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/159
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A composite encoder/syndrome generating device that both computes check symbols over counterpart data symbol strings to form codewords, and derives syndromes from codewords indicative of their error state. The multistage device provides recursive processing paths at each stage of depth corresponding to the number of symbols concurrently applied to the device. The device is adapted as an encoder when the feed-forward paths between stages are enabled; it is adapted as a syndrome generator upon their disablement. The number of symbols concurrently processed may be varied from clock cycle to clock cycle by conforming the recursion paths per stage to the number of symbols applied as input to the device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.