Device for evaluating characteristic of insulated gate transistor
US6407573B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Jan 28, 1999 |
| Grant date | Jun 18, 2002 |
| Priority date | — |
| Expiry date | Jan 28, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A transistor having a longer channel length and serving as a reference, and a transistor having a shorter channel length and to be subjected to effective channel length extraction are prepared (step ST1.1). A hypothetical point at which a change in a total drain-to-source resistance is estimated to be approximately zero when a gate overdrive is slightly changed is extracted in a mask channel length versus total drain-to-source resistance plane. The values of a function (F) are calculated which are defined by the difference between the rate of change in the total drain-to-source resistance and the product of a channel resistance per unit length and the rate of change in a mask channel length at the hypothetical points (step ST1.6). A true threshold voltage of the transistor having the shorter channel length is determined by a shift amount (&dgr;) which minimizes the standard deviation of the function (F) determined in the step ST1.7 (step ST1.10). A resistance-based method thus extracts an effective channel length and a series resistance with increased accuracy.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.