System and method for providing automatic compensation of IC design parameters that vary as a result of natural process variation
US6407611B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 24, 1999 |
| Grant date | Jun 18, 2002 |
| Priority date | — |
| Expiry date | Aug 24, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/20
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A system and method for providing automatic compensation of IC design parameters that vary as a result of natural process variation is disclosed. In a simplified embodiment, the difference in voltages, &Dgr;VGS, between two identical diode-connected MOSFETs, which are biased with currents that are known to be different in value, is determined. &Dgr;VGS, is inversely proportional to the transconductance of the first of the two diode-connected MOSFETs, which is also biased with a current, ID. A relationship that embodies a direct proportionality between the transconductance of the first diode-connected MOSFET and a circuit performance parameter is derived, thereby establishing a relationship between &Dgr;VGS and the circuit performance parameter. Process compensation is then implemented, comparing known reference voltages with &Dgr;VGS. The outputs of the comparison are latched into digital decoding logic which provides coarse steering (process compensation) current to a functional circuit, thereby centering the circuit with respect to process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.