Method and apparatus for controlling stages of a multi-stage circuit
US6407689B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 1, 2000 |
| Grant date | Jun 18, 2002 |
| Priority date | — |
| Expiry date | Nov 11, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/47
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A control mechanism that can be used to control a &Sgr;&Dgr; ADC to provide the required level of performance while reducing power consumption. The &Sgr;&Dgr; ADC is designed with multiple stages (i.e., loops or sections), and provides improved performance (e.g., higher dynamic range) as more stages are enabled. The control mechanism selectively enables a sufficient number of stages to provide the required performance and disables remaining stages to conserve power. The control mechanism achieves this by measuring one or more characteristics (e.g., signal level) of the ADC input signal through a &Sgr;&Dgr; ADC that is similar to the &Sgr;&Dgr; ADC on the signal path, comparing the measured characteristic(s) to particular threshold level(s), and controlling the stages such that the desired objectives are achieved. In one implementation, the control circuit includes one or more detector stages, a conditioning circuit, and a signal processor. The detector stage(s) receive the input signal and provide a detected signal. The conditioning circuit receives the detected signal and provides conditioned samples. The signal processor receives the conditioned samples and provides a control sig…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.