Structure of printed circuit board with stacked daughter board
US6407930B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 9, 1999 |
| Grant date | Jun 18, 2002 |
| Priority date | — |
| Expiry date | Jul 9, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09181
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A structure of a printed circuit board with stacked daughter board. The structure has a motherboard and at least a daughter board. The motherboard has a first signal layer, a second signal layer, a first power layer, a first ground layer and isolation layers between every layer. The first signal layer and the second signal layer serve as surfaces of the motherboard and first contacts are formed on the first signal layer. The daughter board includes a third signal layer, a fourth signal layer, a second power layer, a second ground layer and isolation layers between every layer. The second power layer or the second ground layer serves as a surface of the daughter board and second contacts are formed on the surface. The daughter board is stacked on the motherboard and the second contacts are coupled with the first contacts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.