Method for protecting an over-erasure of redundant memory cells during test for high-density nonvolatile memory semiconductor devices
US6407944B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2000 |
| Grant date | Jun 18, 2002 |
| Priority date | — |
| Expiry date | Mar 23, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3404
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method is disclosed for preventing over-erasure in a nonvolatile memory device having a plurality of sectors, each sector including a main field and a redundant field. The method includes the steps of programming memory cells included in the main and redundant fields, erasing the memory cells included in the main and redundant fields, and programming over-erased cells of the memory cells included in the main and redundant fields. The main and redundant fields are included in a sector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.