Synchronous digital communications system and control installation
US6411633B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 26, 2000 |
| Grant date | Jun 25, 2002 |
| Priority date | — |
| Expiry date | Oct 26, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J2203/006
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
The network elements NE1, . . . , NE6 of a synchronous digital communications system must be synchronized with each other without the possibility of clock loops occurring. A network node NODE contains network elements NE1, . . . , NE6 and a central clock generator SASE. The network elements transmit clock signals 2M to the clock generator, which contain a clock of a message signal STM-N and a quality indicator (SSM) contained in the message signal which reflects the accuracy of the clock. The clock generator selects one of the clock signals 2M as the reference clock REF and informs the control installation STE which of the clock signals it has selected and the degree of accuracy of this clock signal. On the basis of this message STAT the control installation gives instructions ANW to the network elements with respect to the quality indicator which the network elements are to transmit to their outputs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.