Loop delay compensation for a digital power amplifier
US6414560B2 · kind B2 · utility
8Cited by
7References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 28, 2001 |
| Grant date | Jul 2, 2002 |
| Priority date | — |
| Expiry date | Feb 28, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/2171
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A modulator loop is described having an associated band pass frequency range and including a switching stage having a first delay associated therewith. The modulator loop also includes a modulator stage having a feedback input. The output of the modulator stage is coupled to the input of the switching stage. A first feedback path is coupled between the output of the switching stage and the modulator stage. A notch filter corresponding to the band pass frequency range is coupled between the output of the modulator stage and the feedback input of the modulator stage for compensating for the first delay.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.