Register setting-micro programming system
US6414687B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 18, 1998 |
| Grant date | Jul 2, 2002 |
| Priority date | — |
| Expiry date | Feb 18, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A graphics processor includes a plurality of interrelated functional modules and at least one register associated with each of the functional modules. The plurality of interrelated functional modules are interconnected by a data pipeline for conveying data, and each register is configured to control a function of its associated functional module. The graphics processor also includes a control bus interconnecting each of the registers for conveying instructions, and an instruction controller for decoding instructions for use with the graphics processor. The control bus and the data pipeline are physically separate, and the instruction controller includes a register setting unit adapted to set the registers via the control bus in accordance with a decoded instruction. This enables the function of each of the functional modules to be configured in response to each instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.