nvSRAM with multiple non-volatile memory cells for each SRAM memory cell
US6414873B1 · kind B1 · utility
47Cited by
18References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 16, 2001 |
| Grant date | Jul 2, 2002 |
| Priority date | — |
| Expiry date | Mar 16, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C14/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention relates to a non-volatile, static random access memory (nvSRAM) in which there are at least two, non-volatile memory cells associated with each SRAM memory cell. The non-volatile memory cells are capable of being programmed with whatever bit of information is present in the SRAM at two different times. In one embodiment, the non-volatile memory cells are capable of being randomly programmed, i.e., programmed in any order. Further, the bits of data programmed into the non-volatile memory cells can be recalled in any order, i.e., randomly recalled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.