Patent · US Expired

Bridging device for mapping/demapping ethernet packet data directly onto and from a sonet network

US6414966B1 · kind B1 · utility

80Cited by
2References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 15, 2000
Grant dateJul 2, 2002
Priority date
Expiry dateJun 15, 2020

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04J2203/0085
  • WIPO fieldTelecommunications
  • WIPO sectorElectrical engineering

Abstract

A bridging device for mapping and demapping Ethernet data packets onto a SONET network includes an Ethernet controller chip set which receives packet data, a SONET framer for a SONET interface, a UTOPIA interface for the SONET framer, and an FPGA (or ASIC) which bridges the UTOPIA interface and a system bus interface of the Ethernet controller. The FPGA is preferably implemented in VHDL software code as several modules: an Ethernet controller interface module, a chunk memory module, a UTOPIA interface module, a microprocessor interface module, and a UTOPIA OUT module. In a transmit mode, the Ethernet controller interface module interfaces with the data and control signals from a thirty-two bit data bus of the Ethernet controller chip set and writes the data to chunk memory implemented in the FPGA. The chunk memory module implements the chunk memory to a programmable size. The UTOPIA interface module implements an interface with data and control bus signals of Fr-UTOPIA and reads data sixteen bits at a time from chunk memory and writes the data to the Fr-UTOPIA interface bus. The microprocessor interface module implements the control and status registers. The UTOPIA OUT module imple…

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.