Memory statistics counter and method for counting the number of accesses to a portion of memory
US6415363B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2000 |
| Grant date | Jul 2, 2002 |
| Priority date | — |
| Expiry date | Feb 24, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/88
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory statistic counter and method for counting the number of accesses (writes or reads) by a microprocessor (10) to at least a portion of a memory comprising a decoding logic unit (16) for providing a selection signal for selecting the portion of memory in response to control signals from the microprocessor, and adding logic units (18, 20, 22). The memory statistic counter includes a register which is incremented each time the portion of memory is accessed by the microprocessor and providing a registration signal when the number of accesses is equal to a predetermined number, and a queuing unit (44) for registering a value in a registering memory (50), such as a first-in-first-out (FIFO) memory, in response to the registration signal and providing an interrupt signal to the microprocessor when all locations of the registering memory have been filled, thereby indicating to the microprocessor that a defined number of accesses to the portion of memory has occurred.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.