Method and apparatus for power throttling in a microprocessor using a closed loop feedback system
US6415388B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 1998 |
| Grant date | Jul 2, 2002 |
| Priority date | — |
| Expiry date | Oct 30, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for power throttling in a microprocessor. A voltage source supplies voltage to the microprocessor, and a clock source operates the microprocessor at a desired frequency. In one embodiment, a power monitor is configured to measure the short term power consumption of the microprocessor. In another embodiment, a temperature sensor measures the temperature of the microprocessor. Control logic is coupled to the voltage source and the clock source. The control logic receives an indication of the power consumption or temperature, as applicable, and compares it to a predetermined value. In response to the comparison, the control logic varies the supply voltage and the frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.