Jumperless computer system
US6415389B2 · kind B2 · utility
0Cited by
5References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2001 |
| Grant date | Jul 2, 2002 |
| Priority date | — |
| Expiry date | Mar 1, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4072
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An insert signal generation circuit connected to a socket for generating an insert signal as a processor is inserted into a processor socket. The circuit includes an insert detection circuit connected to the socket for generating a detection signal as the processor is inserted in the processor socket. A Smith trigger is provided in the circuit to, responsive to the detection signal, generate a pulse signal. A flip-flop is provided in the circuit to, responsive to the pulse signal, to generate the insert signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.