Integrated verification and manufacturability tool
US6415421B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2000 |
| Grant date | Jul 2, 2002 |
| Priority date | — |
| Expiry date | Dec 22, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F1/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated verification and manufacturability tool provides more efficient verification of integrated device designs than verification using several different verification tools. The integrated verification and manufacturability includes a hierarchical database to store shared design data accessed by multiple verification tool components (e.g., layout versus schematic, design rule check, optical process correction, phase shift mask assignment and machine language conversion). The hierarchical database includes representations of one or more additional, or intermediate layer structures that are created and used by the verification tool components for operations performed on the design being verified. Use of a single hierarchical database having shared data for access and use by multiple verification components streamlines the verification process, which provides an improved verification tool.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.