Depopulation of a ball grid array to allow via placement
US6417463B1 · kind B1 · utility
25Cited by
5References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 2, 2000 |
| Grant date | Jul 9, 2002 |
| Priority date | — |
| Expiry date | Oct 2, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49222
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides an apparatus and methods for the functionality of an integrated circuit. An exemplary embodiment according to an aspect of the present invention includes a ball grid array having open spaces therein. Within the open spaces, pairs of opposite polarity vias are clustered to minimize current path inductance by exploiting mutual inductance between vias of opposite current flow. In an illustrative embodiment, capacitors are coupled to the vias to further reduce current path inductance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.