Pipelined high speed data transfer mechanism
US6418478B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 11, 1998 |
| Grant date | Jul 9, 2002 |
| Priority date | — |
| Expiry date | Mar 11, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3495
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There is disclosed in a communications system having an origination storage device and a destination storage device, a data transfer pipeline apparatus for transferring data in a sequence of N stages, where N is a positive integer greater than 1, from the origination to the destination device. The data transfer apparatus comprises dedicated memory means having a predetermined number of buffers dedicated for carrying data associated with the transfer of data from the origination storage device to the destination device; and master control means for registering and controlling processes associated with the data transfer apparatus for participation in the N stage data transfer sequence. The processes include at least a first stage process for initiating the data transfer and a last Nth stage process for completing data transfer. The first stage process is operative to allocate a buffer from the predetermined number of buffers available within the dedicated memory means for collection, processing, and sending of the data from the origination device to a next stage process. The Nth stage process is operative to receive a buffer allocated to the first stage process from the (N−1)th…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.