Split computer architecture to separate user and processor while retaining original user interface
US6418494B1 · kind B1 · utility
61Cited by
16References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 29, 1999 |
| Grant date | Jul 9, 2002 |
| Priority date | — |
| Expiry date | Oct 29, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/329
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A network interface is described in which a single computer bus is split over a long distance into two or more intercommunicating buses. On one bus, processing and applications are provided and on the other remote bus, peripheral and local controllers are provided. The buses communicate through a series of: bridge, FPGA, FPGA and bridge. Between the FPGAs, a communication path provides long distance communication.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.