Integrated system management memory for system management interrupt handler independent of BIOS and operating system
US6418498B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 30, 1999 |
| Grant date | Jul 9, 2002 |
| Priority date | — |
| Expiry date | Dec 30, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4812
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory controller with an integrated system management memory region is disclosed. The memory controller receives an SMI acknowledge signal from a processor. The processor then delivers a system management memory address to the memory controller. Instead of fetching SMI handler instructions from the address indicated by the processor, the memory controller instead fetches SMI handler instructions from its integrated system management memory region. At the end of the integrated system management memory's SMI handler, the processor is instructed to fetch instructions from the address originally specified by the processor. In this manner, a BIOS SMI routine may be executed after the integrated SMI routine is executed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.