Integrated circuit memory and method for transferring data using a volatile memory to buffer data for a nonvolatile memory array
US6418506B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 31, 1996 |
| Grant date | Jul 9, 2002 |
| Priority date | — |
| Expiry date | Dec 31, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit (IC) memory device having an interface coupled with a volatile random access memory (RAM) array and a nonvolatile flash memory array. Data to be written from an external device to the IC memory device is initially written to the volatile RAM array to provide for fast execution of a write operation, and is then written from the volatile RAM array to the nonvolatile flash memory array via the interface in a manner that is relatively transparent to external devices and the user. The interface may be configured to transfer data from the volatile RAM array to the external device if a read request matches an address tag field stored in the volatile RAM array. Data from first and second block addresses in the volatile RAM array and flash memory array may be merged in a flash merge buffer, and validity bits may be used to ensure that potentially stale data in the flash memory array is not used and that data coherency is maintained. Data may also be simultaneously written to or read from the volatile RAM array during at least a portion of the time in which data is being read from or written to the flash memory array. A check may be made to ensure that the flash merge b…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.