Method of making multilayered substrate for semiconductor device
US6418615B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 10, 2000 |
| Grant date | Jul 16, 2002 |
| Priority date | — |
| Expiry date | Mar 10, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49345
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A substrate of multilayered structure having a plurality of sets of an insulation layer and a wiring line layer, and having one face for mounting a semiconductor element thereon and the other face on which external connection terminals are to be provided, the face for mounting a semiconductor element being provided with pads to be bonded to an electrode terminal of the semiconductor element, the other face being provided with pads to be bonded to an external connection terminal, such as a terminal formed of a solder ball, and the wiring line layers on both sides of an insulation layer being connected with each other by vias piercing the insulation layer, wherein the surfaces of the pads to be bonded to an electrode terminal of a semiconductor element are flat and are in the same plane. A method of manufacturing such a multilayered substrate is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.