Method for protecting an integrated circuit chip
US6420211B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2001 |
| Grant date | Jul 16, 2002 |
| Priority date | — |
| Expiry date | Jul 11, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention concerns a method for protecting integrated circuit chips of a silicon wafer. The silicon wafer is cut so as to disengage the chips from the integrated circuit; and a fluid insulating material is applied on the rear surface of the wafer so as to coat the flanks of each chip of the integrated circuit with a thin insulating layer. The insulating material may be applied by spraying, screen printing, dip coating, casting or any other means. The invention further concerns integrated circuit chips where the flanks are protected by an insulating material to prevent electrical malfunction caused by contact of a conductive material on the flanks of the chips.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.