One layer spider interconnect
US6420663B1 · kind B1 · utility
6Cited by
3References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2000 |
| Grant date | Jul 16, 2002 |
| Priority date | — |
| Expiry date | Nov 30, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device, including a substrate and a signal source disposed on the substrate. The signal. source is adapted to supply a pair of signals to a first plulrality of customers positioned remote from the signal source on the substrate, each of which customers is adapted to receive the pair of signals. There are a second plurality of conductors, formed substantially within a single layer of conductive material deposited on the substrate, and arranged to distribute the pair of signals from the signal source to each of the customers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.