Compatible IC packages and methods for ensuring migration path
US6423572B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 8, 2001 |
| Grant date | Jul 23, 2002 |
| Priority date | — |
| Expiry date | Aug 8, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to integrated circuit packaging useful for programmable logic devices. The invention provides a migration path between a base integrated circuit and an extended integrated circuit that is a functional superset of the base. In the case of a programmable logic device (PLD), the pin element layout for a base integrated circuit provides for the connection of power, control, and I/O signals. Pins conducting power signals are located at the core of the base pin layout. Pins conducting control signals are located near the intersections of the horizontal and vertical axes of the layout and the perimeter of the layout. Remaining pins conduct I/O signals. The pin element layout for an extended integrated circuit subsumes the base pin element layout. Additional pins for conducting power signals are located near one or more diagonal axes of the extended pin element layout. Methods for determining an extended integrated circuit pin element layout starting from a base pin element layout are disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.