Method of manufacturing a capacitor in a semiconductor integrated circuit and a capacitor fabricated thereby
US6423608B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 3, 2000 |
| Grant date | Jul 23, 2002 |
| Priority date | — |
| Expiry date | Nov 3, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/315
Abstract
A capacitor in a semiconductor integrated circuit, and a method for fabricating the capacitor is disclosed. A method of an embodiment of the invention includes first providing a semiconductor substrate having disposed thereon an interlayer insulating layer. A lower sacrificial insulating layer and an upper etching stopper layer then are sequentially formed on the interlayer insulating layer on the semiconductor substrate. The upper etching stopper layer and the lower sacrificial insulating layer then are sequentially patterned to form a storage electrode hole, and to expose a predetermined portion of the interlayer insulating layer. The method then includes forming an outer cylindrical storage electrode in the storage electrode hole, a conductive liner surrounded by the outer cylindrical storage electrode, and an inner storage electrode surrounded by the conductive liner. Finally, the method of an embodiment of the invention includes selectively etching the conductive liner to expose an inner sidewall of the outer cylindrical storage electrode and an outer sidewall of the inner storage electrode. Depending on the storage electrode dimension, the inner storage electrode can exhibit …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.