Silicon wafers for CMOS and other integrated circuits
US6423615B1 · kind B1 · utility
6Cited by
3References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 22, 1999 |
| Grant date | Jul 23, 2002 |
| Priority date | — |
| Expiry date | Sep 22, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/041
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
Techniques include heating a substantially uniformly boron-doped wafer to achieve a significantly increased resistivity in a near-surface region of the water and forming at least one electrical circuit element in the near-surface region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.