Stabilized phase lock detection circuits and methods of operation therefor
US6424228B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 20, 2000 |
| Grant date | Jul 23, 2002 |
| Priority date | — |
| Expiry date | Sep 20, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S331/02
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase lock detection circuit includes a phase detection circuit that produces a phase detect signal having one of a first logic state or a second logic state responsive to a first input signal and a second input signal applied thereto. A stabilized phase lock indication circuit is electrically coupled to the phase detection circuit and produces a phase lock indication signal having one of a first logic state or a second logic state, the phase lock indication signal changing to a respective one of its first and second logic states in response to the phase detect signal remaining in a respective one of its first and second logic states for a predetermined time interval. In a first embodiment, the phase lock indication is controlled by monitoring a digital count. In a second embodiment, the phase lock indication signal is controlled by monitoring a capacitor voltage. Related operating methods are also discussed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.