Binsorter triangle insertion optimization
US6424345B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 14, 1999 |
| Grant date | Jul 23, 2002 |
| Priority date | — |
| Expiry date | Oct 14, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for rendering polygons in a computer graphics system in which the computer display is divided into a plurality of subregions, and the rasterization process is performed in a micro framebuffer for each subregion, rather than sending raster data for each triangle into the frame buffer. Each polygon undergoes a first stage bounding box intersection test to identify the subregions which are likely to intersect with the polygon. If the number or configuration of intersected subregions exceeds a predetermined threshold requirement, then the polygon undergoes a more precise second stage intersection test to identify which subregions are actually intersected by the polygon. If the number or configuration of intersected subregions is below the threshold requirement, then the control data for the polygon is passed on to each of the identified subregions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.